Design automation and QoS requirements preservation for multiprocessor embedded systems
dc.contributor.advisor | Azim, Akramul | |
dc.contributor.author | Maruf, Md. Al | |
dc.date.accessioned | 2019-07-17T16:30:58Z | |
dc.date.accessioned | 2022-03-29T16:46:29Z | |
dc.date.available | 2019-07-17T16:30:58Z | |
dc.date.available | 2022-03-29T16:46:29Z | |
dc.date.issued | 2019-07-01 | |
dc.degree.discipline | Electrical and Computer Engineering | |
dc.degree.level | Master of Applied Science (MASc) | |
dc.description.abstract | The number of processors is increasing in embedded systems but the usefulness of parallel computation is not better leveraged due to the inflexibility of design and implementation for multiprocessor embedded system applications. A higher level abstraction (i.e., a parallel programming framework) can ease the programmers to define parallelism for tasks in an application, but designers still face the complexity of mapping high-level requirements to the syntax and semantics of a parallel programming interface. Nevertheless, embedded system applications execute various periodic tasks that are carried out repeatedly within a certain time interval. Each task is characterized by its deadline where it is expected to perform a function producing a correct result within a specified amount of time. These tasks may be able to run in parallel to utilize the system efficiently. Moreover, embedded systems often interact with dynamic environments requiring not only to meet deadlines of tasks but also to achieve a certain level of accuracy as the inaccuracy of a task output produces a similar adverse effect like timing violation. Therefore, it requires an automated design process to map the tasks to lower level and a monitoring framework to meet the high-level requirements of embedded system applications. This thesis presents a parallel loop-based task construct to automate the design process of embedded applications from Architecture Analysis and Design Language (AADL) models and demonstrates how to preserve the requirements at lower-levels. AADL is practiced to model the software and hardware architecture of embedded systems. Since most of today's embedded systems either belong to soft real-time systems (i.e., stream processing systems) or weakly-hard real-time systems (e.g., control systems), we adopt a new task scheduling approach in a well-known parallel programming interface called OpenMP for increasing determinism in soft real-time system (RTS) applications. Moreover, we propose a calibration framework to increase the robustness of weakly-hard real-time system applications that rely on time-driven scheduling approaches such as rate monotonic (RM) scheduling. In this thesis, determinism and robustness are the way of measuring the quality of service (QoS) requirements of tasks. For increasing the robustness of weakly-hard real-time systems, the calibration framework is used by which the system component's output accuracy can be monitored and compared with a calibration standard. The calibration standard is derived from a representative component's output with known high accuracy. As an example, we analyze the accuracy of a component that performs dynamic voltage and frequency scaling (DVFS) and explains the associated timing effects in terms of task schedulability. To illustrate the applicability of our mechanism, the experimental analysis incorporates a design automation process for mapping tasks to parallel programming framework in soft RTSs, a calibration framework for monitoring task output in weakly-hard RTSs. To understand the calibration framework, a software-based monitoring approach is shown for a resistive voltage divider as a case study. Therefore, we use a cost estimation model to demonstrate the efficiency of the automation process and map tasks over multiple processor cores using OpenMP. To ensure meeting high-level requirements of embedded system applications, we analyze the existing OpenMP scheduling mechanisms and propose a layer of adaptation. We show that our proposed adaptation layer facilitates a tighter execution time bound for time-sensitive tasks or a better throughput for tasks that require higher QoS. Thus, the proposed design automation framework is applicable for a variety of applications with different QoS requirements preserved at the lower level. To monitor the QoS of task output, we perform experiments on LITMUSRT kernel to demonstrate the need and applicability of our calibration framework in the domain of embedded systems. The experimental results illustrate that the proposed approach yields more predictability and show better performance for preserving QoS requirements of tasks. | en |
dc.description.sponsorship | University of Ontario Institute of Technology | en |
dc.identifier.uri | https://hdl.handle.net/10155/1064 | |
dc.language.iso | en | en |
dc.subject | Embedded systems | en |
dc.subject | Task scheduling | en |
dc.subject | Design automation | en |
dc.subject | Parallel computing | en |
dc.subject | Calibration | en |
dc.title | Design automation and QoS requirements preservation for multiprocessor embedded systems | en |
dc.type | Thesis | en |
thesis.degree.discipline | Electrical and Computer Engineering | |
thesis.degree.grantor | University of Ontario Institute of Technology | |
thesis.degree.name | Master of Applied Science (MASc) |